1. Field of the Invention
The present invention relates to a vertical stack type multi-semiconductor package and an associated method of fabrication. More particularly, embodiments of the invention relate to a vertical stack type multi-chip package having improved grounding performance of a system in package (SIP) configuration and improved reliability generated in a lower first semiconductor chip.
This U.S non-provisional patent application claims priority under 35 U.S.C § 119 of Korean Patent Application 10-2006-0072661 filed on Aug. 1, 2006, the entire contents of which are hereby incorporated by reference.
2. Discussion of Related Art
There is a high demand for portable electronic products. Semiconductor devices used in such portable electronic products must be light, thin, short and small. These devices may be developed by reducing the size of a discrete semiconductor device, forming a system on chip (SOC) by placing several semiconductor devices in one semiconductor chip to make one chip, and forming a system in package (SIP) by packaging a plurality of semiconductor devices in one semiconductor package.
SIP technology involves packaging a plurality of semiconductor chips into a single semiconductor package by horizontally or vertically stacking the semiconductor chips on a lead frame or a substrate. This technology is similar to the concept applied in existing multi-chip module (MCM) technology. That is, existing MCM technology involves mounting semiconductor chips horizontally where SIP technology involves vertically stacking the semiconductor chips.
Certain semiconductor devices, for example, for radio frequency (RF) applications, are influenced by an external electromagnetic field. Furthermore, low impedance and low inductance are required due to the characteristics particular to RF semiconductor devices. Therefore, a ground shielding design from the external environment is employed in order to satisfy the requirements of low impedance and low inductance. Thus, a semiconductor package that is resistive to noise can be fabricated by enhancing the grounding performance of the SIP including the semiconductor device for RF applications.
An example of providing a semiconductor package by enforcing the grounding performance in SIP technology is disclosed in US Application Publication No. 2004/0183180 A1 (Publication Date: Sep. 23, 2004, Title: Multi-Chips stacked package) by Advanced Semiconductor Engineering Inc. However, since a lower semiconductor package is sealed by a cap-shaped supporter and the inner portion of the lower semiconductor package is filled with air, moisture penetrates into the sealed portion through the organic substrate which causes a decrease in the reliability of the semiconductor device.